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Maryam Parsa

Mason ECE assistant professor Maryam Parsa
Titles and Organizations

Tenure-Track Assistant Professor,ÌýDepartment of Electrical and Computer Engineering

Contact Information

Phone: 703-993-6097
Campus: Fairfax
Building: Nguyen Engineering Building
Room 3215
Mail Stop: 1G5
Email:Ìýmparsa@gmu.edu

Personal Websites

Biography

Maryam Parsa is an assistant professor in the Electrical and Computer Engineering department at George Mason Ä¢¹½AV. Prior to joining Mason, she was a postdoctoral researcher at Oak Ridge National Laboratory in the Beyond Moore Computing group. She received her PhD in electrical and computer engineering from the Center for Brain-Inspired Computing (C-BRIC) at Purdue Ä¢¹½AV in December 2020 with a prestigious four-year Intel Corporation and Semiconductor Research Corporation (SRC) PhD fellowship.

Parsa has broad interests in the areas of neuromorphic computing, neural architecture search, and Bayesian optimization across the full stack of materials, devices, circuits, systems, algorithms, and applications. Her research involves developing causal and physics-based machine learning and Bayesian optimization to accelerate materials discovery. Further, in her focus on neuromorphic computing, her goal is to not only enable accurate, fast, energy-efficient, and resilient intelligence at the edge through algorithm-hardware codesign but also to develop novel hierarchical learning/training approaches based on Bayesian optimization, evolutionary optimization, and synaptic learning rules. She is interested in a wide range of applications such as computational neuroscience, smart healthcare diagnosis, and cyber-physical systems.

Degrees

  • PhD,ÌýElectrical and Computer Engineering,ÌýPurdue Ä¢¹½AV
  • MS, Civil Engineering,ÌýPurdue Ä¢¹½AV
  • MS,ÌýElectrical and Computer Engineering,ÌýÄ¢¹½AV of Ottawa
  • BS,ÌýElectrical and Computer Engineering,ÌýKhaje Nasir Toosi Ä¢¹½AV of Technology

Research Interests

  • Neuromorphic learning
  • Bio-inspired robotics
  • Distributed learning
  • Algorithm hardware co-designÌý

Publications

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